74181 ALU PDF

To find out, I opened up a ALU chip, took high-resolution die photos, and reverse-engineered the chip. The was a popular chip in the s used to perform calculations in the arithmetic-logic unit ALU of minicomputers. It is a moderately complex chip containing about 67 gates and transistors 3 , implemented using fast and popular TTL transistor-transistor logic circuitry. The die photo is below. Click the image for a high-resolution version. The golden stripes are the metal layer that interconnects the circuitry of the chip.

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To find out, I opened up a ALU chip, took high-resolution die photos, and reverse-engineered the chip. The was a popular chip in the s used to perform calculations in the arithmetic-logic unit ALU of minicomputers.

It is a moderately complex chip containing about 67 gates and transistors 3 , implemented using fast and popular TTL transistor-transistor logic circuitry. The die photo is below. Click the image for a high-resolution version. The golden stripes are the metal layer that interconnects the circuitry of the chip.

The white squares around the edge of the die are the pads that are connected by tiny bond wires to the external pins. Under the metal layer is the silicon that makes up the chip. Faint lines show the doped silicon regions that make up the transistors and resistors. While the chip may appear impossibly complex at first, with careful examination it is possible to understand how it works. Die photo of the ALU chip. The chip is important because of its key role in minicomputer history.

Before the microprocessor era, minicomputers built their processors from boards of individual chips. Early minicomputers built ALUs out of a large number of simple gates. The is still used today in retro hacker projects. The diagram below shows how an NPN transistor appears in an integrated circuit, along with a cross section.

The transistor has three connections: the collector, base and emitter, with metal lines for each. The collector is connected to N-type silicon, the base to P silicon, and the emitter to N silicon giving it the NPN structure. On the chip, you can recognize the emitter from its nested squares, the base because its silicon region surrounds the emitter, and the collector because it is the largest contact.

The key idea of the NPN transistor is it acts as a switch between the collector and emitter, controlled by the base. But if you pass a small current from base to emitter, the transistor allows a large current from collector to emitter, like a switch in the "on" position. This is vastly oversimplified—bipolar transistors are much more "analog"—but should be enough to understand how the works. At the right is the symbol for an NPN transistor with the collector, base and emitter labeled.

Inverter The fundamental component of TTL logic is the inverter, and other gates are modifications of the inverter circuit. The 5V and ground lines run vertically along the left, powering the inverter.

The transistors are highlighted with boxes. The resistors are visible as long strips of doped silicon snaking around. On the right is the schematic for a TTL inverter 10 , with components highlighted to match the die photo. An inverter in the ALU chip, along with a schematic showing the components of the inverter.

The input is connected to transistor Q1 red. This transistor is used in an unusual way, acting as a "current-steering" transistor. Transistor Q2 orange can be considered a "phase splitter transistor", which makes sure that exactly one of the output transistors Q3 and Q4 is activated.

That is, they turn on in opposite phases. If Q2 is off, R2 provides current to turn on Q3 yellow , which pulls the output high. Meanwhile, R3 turns off Q4. On the other hand, if Q2 turns on, it provides enough current to turn on Q4 green , which pulls the output low. The different types of gates are highlighted. There are a few inverters red to invert input signals. The chip uses a few XOR gates purple to compute sums. Finally, there are a couple unique gates shown in yellow.

Schematic of the ALU. The schematic can be matched up with the labeled die image below. Conveniently, the layout of the die largely matches the schematic. Also notice the large chip real estate used for resistors. The chip pins are labeled with blue text. The metal layer was removed for this photo, to make the underlying circuitry more visible.

The ALU die, with main gate types outlined. An AND gate is implemented by adding more emitters to the current-steering input transistor red. This may seem very strange, but transistors with multiple emitters are common in TTL circuits. If all inputs are high, the base current will be steered to the collector. Otherwise, the base current will flow out the emitter. Thus, the AND of the inputs is generated.

The NOR gate is implemented by putting phase splitter transistors in parallel orange. If any of the bases are high, the corresponding transistor Q2A or Q2B will conduct, pulling the output low. While the circuit below has two AND gates, it can easily be extended to as many gates and inputs as desired.

The multiple-emitter transistors that implement AND are highlighted in red. The transistors that implement OR are highlighted in orange. The diagram below shows how these multiple-emitter transistors are implemented on the chip.

Three of these transistors are shown, each with four or five emitters the dark squares , creating 4-input or 5-input AND gates. The signal lines run horizontally, with emitters connected as needed.

Note that the base resistors take up a significant amount of space. Each one is a single transistor with multiple emitters. Their inputs come from AND circuits such as the ones above. Exclusive-OR The chip uses a clever, compact circuit to compute XOR with two transistors wired in an unusual way: the emitters and bases are tied together and there is no connection to ground.

The way it works is if the first input is high and the second is low, the first transistor turns on due to the base-emitter current. This pulls the output low through the transistor, with the second input acting as ground. Likewise, if the first input is low and the second is high, the second transistor turns on and pulls the output low. If both inputs are the same, there is no base-emitter current, both transistors remain off, and the output is pulled high by the resistor.

The output from the transistor pair goes to the standard inverter stage, so the resulting signal is the XOR of the two inputs. The circuit used in the to compute XOR. Layout inspired by userbinator. A few things to note about the photo. The two transistors share a collector, which is equivalent to wiring their collectors together. Transistor Q1 is wired in the normal current-steering way, with R1 providing a base current.

But transistor Q2 has its resistor connected to the collector, not the base. It uses the multi-emitter transistors but in a subtly different way from the AND gates. Getting the die photos To create die photos, the integrated circuit package must be opened to expose the silicon die inside. Most chips have an epoxy package, which can be dissolved in boiling sulfuric acid. The ALU chip in a ceramic package. I tapped the chip along the seam with a chisel, splitting the two layers apart.

Below, you can see how the metal pins are mounted between the layers, and are connected to the silicon die with tiny bond wires. By tapping the chip with a chisel, the ceramic package can be popped open.

To photograph the die, I used a metallurgical microscope , a special type of microscope that shines light down through the lens to illuminate the chip from above. I took 22 photographs and then used the Hugin stitching software to combine them into a high-resolution image details. Then, I removed the metal layer from the chip with hydrochloric acid and took more images, resulting in the image below. Removing the metal makes it easier to see the structure of the silicon layer and determine how the chip works.

Click for high-resolution version. Removing the metal layer of the chip with HCl reveals the silicon layer underneath. I took detailed die photos of the ALU that reveal how the chip works internally.

These gates are implemented by extending an inverter circuit in different ways, but are more complex than their MOS equivalents. I plan to explain how the implements its 32 functions and fast carry in a future article, so keep watching. I announce my latest blog posts on Twitter, so follow me at kenshirriff. I also have an RSS feed. Note that there are exactly 16 possible functions on two one-bit binary inputs A and B.

The schematic shows 67 gates. If you omit the five 1-input AND gates, you get 62 gates, i. The is apparently the first ALU chip created. Before the was the 4-bit adder chip ; internally, the is similar to the lower half of the Multiplication and division operations were common in computers of that era, but were typically performed with multiple cycles of addition or subtraction.

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March 27, You will all no doubt be familiar with the 74 series logic integrated circuits, they provide the glue logic for countless projects. One of the more famous of these devices is the , a cascadable 4-bit arithmetic logic unit, or ALU. An ALU is the heart of a microprocessor, performing its operations. The appeared in many lates and earlys minicomputers, will be familiar to generations of EE and CS students as the device they were taught about ALUs on, and can now be found in some home-built retrocomputers. Why on earth you might think would an ALU need to do that? The answer lies in the way it performs carrying while adding, a significant speed-up can be achieved over ripple carrying along a chain of adders if it can be ascertained whether a bit addition might generate a carry bit. He explains the function required to perform this operation, and suddenly the unusual extra function makes sense.

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Rotate Rotate through carry ALU shift operations cause operand A or B to shift left or right depending on the opcode and the shifted operand appears at Y. Simple ALUs typically can shift the operand by only one bit position, whereas more complex ALUs employ barrel shifters that allow them to shift the operand by an arbitrary number of bits in one operation. In all single-bit shift operations, the bit shifted out of the operand appears on carry-out; the value of the bit shifted into the operand depends on the type of shift. Logical shift : a logic zero is shifted into the operand. This is used to shift unsigned integers.

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But if you look at the chip more closely, there are a few mysteries. And if you look at the circuit diagram below , why does it look like a random pile of gates rather than being built from standard full adder circuits. And I show how the implements carry lookahead for high speed, resulting in its complex gate structure. The internal structure of the chip is surprisingly complex and difficult to understand at first.

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